1. Field of the Invention
This invention relates generally to the field of semiconductor circuit design, and more particularly to the design of improved over-voltage protection in low-power systems.
2. Description of the Related Art
In contemporary electric circuit design, systems oftentimes require large number of devices to be configured on as small an area as possible in order to save cost and increase the system's operating speed. This trend has affected the design of integrated circuits (IC), including microprocessors, microcontrollers, and even Systems-On-Chip (SOC), in which all components of a computer or other electronic system are integrated on a single IC. SOCs may contain digital, analog, mixed-signal, and often radio-frequency components all configured on a single IC. In decreasing the area of an IC on which the system or microprocessor is integrated, the geometry shrink is three dimensional, including a reduction in the thickness of the gate oxide layer. As a consequence, the level of the power supply voltage provided to the IC needs to be lowered in order to accommodate the thinner gate oxide. However, many peripheral devices connected to the IC (e.g. to a processor) may still require higher supply voltages, resulting in higher signaling levels for those devices. Since these devices are connected to the IC, the IC may be exposed to input signals having a voltage level that exceeds the level of the supply voltage powering the IC, potentially resulting in circuit malfunction and/or destruction of the IC. This makes it necessary to implement some form of protection into the integrated circuit, to preempt damage caused by high-voltage input signals.
Some IC designs have strict input requirements, which prohibit the voltage level of input signals from exceeding the internal power supply voltage, or external supply voltage that is powering the IC. However, when the input signal is signal external to the IC (chip) and provided to an on-chip pin, this requirement cannot always be satisfied. For example, it is possible for the actual voltage at the pin to rise to a higher voltage, e.g. 5V, when the drivers of devices external to the chip are coupled to on-chip pins. Various mechanisms and solutions have been devised to protect the IC from such high voltage input signals. One approach involves configuring a circuit for an off-chip driver output stage to provide protection. Another approach includes a circuit configured to protect the transistor from gate-oxide dielectric breakdown and hot-carrier degradation. In some cases a circuit may be configured to provide high voltage protection of the transistor with a 5V power supply and a 5V output voltage of a buffer. However, there are cases when none of those solutions may be applicable due to various design constraints, while the inputs of the circuit still require protection from high voltage signals when the input pin voltage exceeds the voltage of the power supply.
Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.